Intel was first in line for ASML's High-NA EUV scanners, the scarcest and most expensive machines in chipmaking. In my view it then wavered on the roadmap those machines were bought for. The popular version of the story gets several details wrong, and the accurate record is harder on Intel, not softer.
What was actually bought
The machines are ASML's High-NA EUV scanners: the TWINSCAN EXE:5000, a development system, and the EXE:5200 and EXE:5200B built for production. High-NA means a numerical aperture of 0.55 instead of the 0.33 of earlier EUV tools, which ASML says lets chipmakers move from multi-patterning to single patterning. They are not machines for one node size. Which node uses them is the chipmaker's decision.
Intel was the first customer to buy an EXE:5000, in 2018, before Pat Gelsinger became its CEO in 2021. In January 2022, with Gelsinger in charge, Intel placed the first purchase order for the production EXE:5200, and the joint announcement pointed to High-NA manufacturing from 2025. ASML shipped the first EXE:5000 on 21 December 2023. Intel said on 4 January 2024 that it had arrived at its site in Hillsboro, Oregon. heise reported a price of 350 million euros and a weight above 150 tons.
Scarce by design
ASML's 2022 annual report spoke of ramping High-NA capacity to 20 systems a year by 2027 to 2028. Its 2024 annual report lists what existed by then: the prototype in Veldhoven, two more EXE:5000 systems installed at an Intel plant near Hillsboro, and a fourth shipped to a customer in Asia.
So early output was in single digits, not far from the "two a year" of the popular story, though ASML's plan was ten times that. And Intel did not take every unit. What the record does show is a tiny supply with half of it in one company's fab. heise reported that, as launch customer, Intel had priority over other interested buyers.
Bought for 14A, used on 18A
At delivery, the machine was described as serving Intel's post-18A node. At its foundry event in February 2024, Intel named 14A as the first node to use High-NA. In April 2025 it said 14A risk production would start in 2027 and volume production in 2028, and that customers could also choose low-NA patterning without changing their designs.
Did Intel use the machines? Yes, and the record is clear. At the SPIE conference in February 2025, an Intel engineer said about 30,000 wafers had been exposed on two scanners. In December 2025 Intel completed acceptance testing of the EXE:5200B, rated at 175 wafers per hour. On 15 July 2026 ASML announced that Intel had started high-volume manufacturing of a subset of Core Ultra Series 3 "Panther Lake" processors, with High-NA used on select layers of Intel 18A. In September 2026 Intel and ASML said more than one million wafers had been processed, a count that includes certification, R&D and production.
Now read those dates against the promise. The 2022 announcement pointed to manufacturing in 2025. The first volume use came in July 2026, on a node not built around the tool, on selected layers only. ASML says those layers are qualified on standard NXE scanners as well, so the same layer can be exposed on either. 14A, the node the machines were meant for, is scheduled for risk production in 2027. In my view the tools entered production as an option, not as the foundation they were bought to be.
The bet, the exit, the condition
Gelsinger announced IDM 2.0 on 23 March 2021: Intel would build more of its own chips and also become a major foundry for others. In my reading, the High-NA orders were part of that bet. Intel announced on 2 December 2024 that he had retired, effective 1 December, and left the board. Bloomberg reported that he was given the option to retire or be removed. Fortune wrote that the company left little room for interpretation that he was ousted.
The record does not say he was removed over High-NA. The chair's statement talked about restoring investor confidence, putting the product group at the centre, and a leaner Intel.
His successor Lip-Bu Tan took over in March 2025 and made the next node conditional. Intel's second-quarter 2025 10-Q said that without a significant external customer for 14A, Intel may pause or discontinue 14A and successor nodes. The same filing said Intel had been unsuccessful to date in securing any significant external foundry customers for any of its nodes, and that pausing 14A could mean repaying government incentives already received. Tan's memo, quoted by Reuters, said investment in 14A would be based on confirmed customer commitments. By January 2026 he was telling the public Intel was going "big time into 14A".
Bring home the first scarce tool of a generation and you owe the industry a roadmap that outlasts one earnings call.
Put the dates side by side. 2022: High-NA for manufacturing in 2025. 2024: 14A will be first. 2025: 14A may be cancelled without a customer. 2026: all in. To me that is not a roadmap. It is a company deciding what it believes each quarter.
TSMC waited
TSMC went the other way. In April 2025 it said A14, due in production in 2028, would not need High-NA. Kevin Zhang said in May 2025 that A14's gains were very substantial without High-NA, and that TSMC would adopt it when it sees a meaningful, measurable benefit. The tools were reported at about 380 million dollars, against about 180 million for the earlier generation. On ASML's October 2026 call its CEO said TSMC plans High-NA in volume around 2030 and Samsung from 2028.
I call that engineering discipline: spend when the benefit is measured, not when the press release is due. TSMC set out to extend the life of its current low-NA machines. Intel's most expensive purchase waited for a node, and then for a customer.
What I take from it
Being first to a scarce tool is a privilege, and in my view it carries a duty to ship on it. Intel took early deliveries of a machine the world had only a handful of, and by its own filing in mid-2025 it could not say it would build the node the machine was for. The same filing put its net property, plant and equipment above 100 billion dollars, most of it in the foundry business.
I cannot prove that any buyer was delayed by Intel's place in the queue, and I will not claim it. What I can say is that two of the first four systems sat in one company's fab, that the company then told its investors the next node was conditional, and that Samsung and TSMC have since given High-NA volume dates of 2028 and around 2030.
The popular story has the machines sitting unused. They ran wafers. The failure is slower and, to me, worse: a bet placed early, announced loudly, then hedged in public.